Analog to Digital Converters (ADCs) are used to quantise or digitise an analog input signal. This digitized signal is used in the digital signal processing part of systems to reconstruct source data, or as an approximation of the source data. With the fast evolution of digital signal processing, analog to digital converters (ADCs) have become a key component in a wide range of applications, including audio/video processing, sensing, radar and communications. They are also a key enabling component in developing systems such as Software Defined Radio (SDR).
FIG. 1 shows a model of an ADC stage 10. An input signal y is sampled and quantised 14. During the analog to digital conversion process, clipping errors ec and quantisation errors q are introduced which limit the available signal to noise ratio (SNR) of the output signal. Additionally additive noise 12 is generated by the electronic components of the ADC or other noise source. In the following description, this noise is practically modelled as a fixed noise floor in the ADC and is not related to the input signal. However, the following mathematical analysis is valid for all additive noise which is not related to the input signal. A digitised output signal ŷ is then provided to another component, such as digital signal processor 20. As can be seen in FIG. 1, the ADC output signal quality and thus performance of the ADC is dependent upon clipping errors, quantisation errors and noise.
Let Δ be the quantisation step and let B denote the number of effective bits of the ADC, i.e. B does not include the sign bit and hence, the ADC has 2B+1−2 threshold levels symmetrically placed on either side of the zero level, in addition to the zero level (mid-tread). The most negative and positive input values that are not clipped by saturation (but may be rounded) by the ADC are given by ±A, where
  A  =            (                        2          B                -        1        +                  1          2                    )        ⁢          Δ      .      That is the lower and upper limit of the unclipped input range are ±A. Assuming an ADC with only additive noise, an input signal y in the range −A<y<A gives rise to
                                          y            ^                    =                      k            ⁢                                                  ⁢            Δ                          ,                                  ⁢                  k          =                      ⌊                          y              Δ                        ⌉                                              (        1        )            at the output of the ADC, where └•┐ rounds the argument to the nearest integer. Note that kε{0, ±1, . . . , ±(2B−1)}.
The signal distortion caused by the rounding operation in is referred to as quantisation error. Let q denote the quantisation error:q(y)=y−ŷ=y−kΔ.  (2)
Assuming that the input signal can be modelled as a random variable with probability density function (pdf) ƒ(y), the variance of the quantisation error, σq2, can be computed as:
                                          σ            q            2                    ⁡                      (            y            )                          =                              ∑                          k              =                                                -                                      2                    b                                                  +                1                                                                    2                b                            +              1                                ⁢                                    ∫                                                (                                      k                    -                                          1                      2                                                        )                                ⁢                Δ                                                              (                                      k                    +                                          1                      2                                                        )                                ⁢                Δ                                      ⁢                                          f                ⁡                                  (                  y                  )                                            ⁢                                                q                  2                                ⁡                                  (                  y                  )                                            ⁢                                                ⅆ                  y                                .                                                                        (        3        )            
If the input distributions ƒ(y) satisfies certain conditions, the resulting quantisation error q is uniformly distributed on [−Δ/2, Δ/2] such that the quantisation noise variance is σq2=Δ2/12. The conditions can be found for example in B. Widrow and I. Kollár, Quantization Noise: Roundoff Error in Digital Computation, Signal Processing, Control, and Communications. Cambridge University Press, 2008.
A second type of signal distortion arises from the fact that the input range ±A of an ADC where the device does not saturate is finite. An input signal exceeding this finite range, i.e. |y|>A, will overdrive the ADC into saturation. This type of distortion is referred to as clipping error and we define it as
                                          e            c                    ⁡                      (            y            )                          =                  {                                                                                                                y                      -                      A                                        ,                                                                                        y                    >                                          +                      A                                                                                                                                                              y                      +                      A                                        ,                                                                                        y                    <                                          -                      A                                                                                                                                        0                    ,                                                                    otherwise                                                      .                                              (        4        )            
Assuming that the distribution of y is symmetric about zero, the variance of the clipping noise can be obtained as
                                          σ            c            2                    ⁡                      (            y            )                          =                  2          ⁢                                    ∫              A              ∞                        ⁢                                          f                ⁡                                  (                  y                  )                                            ⁢                                                e                  c                                ⁡                                  (                  y                  )                                            ⁢                              ⅆ                y                                                                        (        5        )            
Assuming that the additive noise variance is σn, the SNR of the output signal is given by:
                    SNR        =                              P            ⁡                          (              y              )                                                                          σ                c                2                            ⁡                              (                y                )                                      +                                          σ                q                2                            ⁡                              (                y                )                                      +                                          σ                n                2                            ⁡                              (                y                )                                                                        (                  5          ⁢          a                )            where P(y) denotes the average power of y. To simplify the analysis, at this point we ignore noise sources unrelated to the input signal such as sample clock jitter, imperfections in sample-and-hold circuitry (aperture jitter), thermal noise and any other distortions of the input signal due to the apparatus used to generate the input signal to be digitised (eg a sensor, receiver front end, etc). Ignoring these effects we can define the signal to quantisation and clipping noise ratio as:
                                          SNR                          c              ,              q                                =                                    P              ⁡                              (                y                )                                                                                      σ                  c                  2                                ⁡                                  (                  y                  )                                            +                                                σ                  q                  2                                ⁡                                  (                  y                  )                                                                    ,                            (        6        )            It can thus be seen that the quantisation and clipping errors are related to the distribution and power of the input signal.
The increasingly important role of ADCs is driving attempts to improve the performance of ADCs to support both existing and emerging digital signal processing applications. For example there exists a gap between current ADC technology and the needs of SDR due to limiting factors such as finite sample rates and dynamic range, and the presence of noise.
One approach to improve the performance of an ADC is to combine the ADC stage with an automatic gain control (AGC) stage. The AGC stage is used to control the ADC input level with the goal of maximising ADC output signal quality (ie minimise the impact of quantisation and clipping errors). The AGC targets an ADC input operating point that reduces quantisation noise by maximizing input range without overdriving the ADC into saturation. FIG. 2 is a block diagram of a conventional system which combines an AGC stage with an ADC stage. The input signal x is fed to the AGC with gain g to generate an output signal y=gx. The gain may be an attenuation (g<1), unity (g=1) or amplification (g>1). This signal is then sampled and quantised by the ADC to yield a digital signal ŷ. However as is shown above in equations (3) and (5) the quantisation and clipping errors are related to the distribution and power of the input signal and thus it is not possible to simultaneously improve the resilience to quantisation error and clipping error by varying the AGC gain.
Several approaches have also been proposed that employ parallel ADCs to improve performance. One approach is a signal averaging architecture which reduces the effect of uncorrelated noise generated by the ADC components. However, by simply averaging the output signals generated by parallel ADCs with identical input signal, this approach does not improve resilience to quantisation and clipping noise. An alternate use of parallel ADCs has been proposed which reduces the effect of clipping noise in order to increase the overall range of input levels that are not clipped by saturation. The architecture includes two parallel ADCs, with an attenuator placed at the input to one of the devices. If the direct path ADC begins to clip, the circuit switches to the ADC with the attenuated input, hence performing selection combining. However, this method does not fully explore the potential for the digital signal processing to also reduce effective quantisation noise within the extended unclipped input range. Time interleaving of parallel ADCs has also been proposed as a means to increase the sample rate.
There is thus a need to develop improved ADC architectures and processing methods to improve performance of ADCs, or at least to provide a useful alternative to current systems.